Modeling and design of EMI-immune OpAmps in 0.18-μm CMOS Technology

CMOS; Circuit simulation; CMOS integrated circuits; Electromagnetic pulse; Frequency response; Integrated circuit design; CMOS operational amplifiers; CMOS technology; Miller operational amplifiers; Offset voltage; Operating condition; Operational amplifiers

Abstract :

[en] This paper explores the modeling and design of Miller-based operational amplifier structures that are highly immune to electromagnetic interference (EMI). The proposed CMOS Miller-based operational amplifier is derived using the present modeling. It provides higher immunity to EMI that is injected into the amplifier's input over a wide range of frequencies; moreover, the frequency response is comparable to that of a Miller operational amplifier. Simulation results show that the maximum EMI-induced input offset voltage for the proposed CMOS operational amplifier is 5 mV at an EMI frequency of 40 MHz, when a 900 mVpp EMI signal is applied at its input. In contrast, the standard Miller operational amplifier generates an input offset voltage of 32 mV under the same operating conditions. The developed mathematical modeling of the EMI-induced offset correlates with the circuit simulations, providing superior accuracy when designing for high EMI robustness. © 1964-2012 IEEE.

Disciplines :

Electrical & electronics engineering

Author, co-author :

Boyapati, S.; IITB-Monash Research Academy, Indian Institute of Technology Bombay, Mumbai, Maharashtra, 400076, India

Redouté, Jean-Michel ; Université de Liège - ULiège > Dép. d'électric., électron. et informat. (Inst.Montefiore) > Systèmes microélectroniques intégrés

Baghini, M. S.; Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai, Maharashtra, 400076, India

Language :

English

Title :

Modeling and design of EMI-immune OpAmps in 0.18-μm CMOS Technology

Publication date :

2016

Journal title :

IEEE Transactions on Electromagnetic Compatibility

ISSN :

0018-9375

eISSN :

1558-187X

Publisher :

Institute of Electrical and Electronics Engineers Inc.

Volume :

Issue :

Pages :

1609-1616

Peer reviewed :

Peer Reviewed verified by ORBi

Available on ORBi :

since 14 September 2018

Statistics

Number of views

38 (1 by ULiège)

Number of downloads

0 (0 by ULiège)

More statistics

Scopus citations^®

Scopus citations^®
without self-citations

OpenCitations

OpenAlex citations

Bibliography

F. Fiori, "A new nonlinear model of EMI-induced distortion phenomena in feedback CMOS operational amplifiers, " IEEE Trans. Electromagn. Compat., vol. 44, no. 4, pp. 495-502, Nov. 2002
M. T. Abuelmáatti, "Analysis of the effect of radio frequency interference on the DC performance of CMOS operational ampliers, " Analog Integr. Circuits Signal Process., vol. 45, pp. 123-130, 2005
F. Fiori, "Operational amplier input stage robust to EMI, " Electron. Lett., vol. 37, no. 15, pp. 930-931, Jul. 2001
C. Walravens, S. Van Winckel, J-M. Redouté, and M. Steyaert, "Efficient reduction of electromagnetic interference effects in operational ampliers, " Electron. Lett., vol. 43, no. 2, pp. 84-85, Jan. 2007
A. Richelli, "CMOS OpAmp resisting to large electromagnetic interferences, " IEEE Trans. Electromagn. Compat., vol. 52, no. 4, pp. 1062-1065, Nov. 2010
S. Boyapati, D. Das, M. Shojaei Baghini, and J-M. Redouté, "A balanced CMOS OpAmp with high EMI immunity, " presented at the Int. Symp. Electromagnetic Compatibility, Gothenburg, Sweden, 2014
W. Sansen, "Distortion in elementary transistor circuits, " IEEE Trans. Circuits Syst. II, vol. 46, pp. 315-325, Mar. 1999
P. Wambacq, and W. Sansen, Distortion Analysis of Analog Integrated Circuits. Norwell, MA, USA: Kluwer, 1998
F. Fiori, "Design of an operational amplifier input stage immune to EMI, " IEEE Trans. Electromagn. Compat., vol. 49, no. 4, pp. 834-839, Nov. 2007
J. Yu, A. Amer, and E. Sanchez-Sinencio, "Electromagnetic interference resisting operational amplifier, " IEEE Trans. Circuits Syst. I, vol. 61, no. 7, pp. 1917-1927, Jul. 2014
B. Razavi, Design of Analog CMOS Integrated Circuits. New York, NY, USA: McGraw-Hill, 2001
Y. Cheng et al., BSIM3v3 Manual, Univ. California, Berkeley, CA, USA, 1996
2015). [Online]. Available: http://www.mosis.com
J-M. Redouté, and M. Steyaert, "EMI resistant CMOS differential input stages, " IEEE Trans. Circuits Syst. I, vol. 57, no. 2, pp. 323-331, Feb. 2010
A. Richelli, and J-M. Redouté, "Increasing the EMI immunity of CMOS operational amplifiers using an on-chip common-mode cancellation circuit, " in Proc. IEEE Int. Symp. Electromagnetic Compatibility, Gothenburg, Sweden, Sep. 2014, pp. 698-702
M. Grassi, J-M. Redouté, and A. Richelli, "Increasing EMI immunity of CMOS operational amplifiers using an integrated on-chip commonmode cancellation circuit, " in Proc. IEEE Int. Symp. Electromagnetic Compatibility, Dresden, Germany, Aug. 2015, pp. 34-39