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Multistage Linear Feedback Shift Register Counters with Reduced Decoding Logic in 130-nm CMOS for Large-Scale Array Applications
Morrison, D.; Delic, D.; Yuce, M. R. et al.
2019 • In IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 27 (1), p. 103-115

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2019 - Multistage Linear Feedback Shift Register Counters.pdf

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