An Integrated LVDS Transmitter-Receiver System with Increased Self-Immunity to EMI in 0.18-μm CMOS

Bit error rate; CMOS integrated circuits; Electromagnetic pulse; Integrated circuit design; Transmitters; Common Mode Range; Communication bus; Low voltage differential signaling; LVDS transmitters; Receiver circuits; Receiver system; Supply voltages; Transverse electromagnetic cell (TEM); Signal receivers

Abstract :

[en] This paper presents the design of an integrated low-voltage differential signaling (LVDS) transmitter-receiver system with a superior immunity to electromagnetic interference (EMI). The effects of injected RF interference on the differential communication bus between the proposed and typical LVDS transmitter and receiver front-ends are presented and explained mathematically. The design of a proposed wide input common-mode range LVDS receiver with an increased noise margin is discussed in detail. Transverse electromagnetic (TEM) cell measurements confirm that the proposed LVDS transmitter-receiver yields a worst-case bit error rate (BER) of 0.1 for an injected 30-dBm EMI signal at 840 MHz, while the typical transmitter-receiver pair fails with a BER of 0.5 for EMI levels as low as 23 dBm at frequencies ranging from 650 to 800 MHz, 820 to 860 MHz, and at 560 MHz. The discussed LVDS transmitter-receiver circuits were designed using the UMC 0.18-μm CMOS process with a supply voltage of 1.8 V. © 1964-2012 IEEE.

Disciplines :

Electrical & electronics engineering

Author, co-author :

Matig-A, G. A.; Department of Electrical and Computer Systems Engineering, Monash University, Melbourne, VIC 3800, Australia

Yuce, M. R.; Department of Electrical and Computer Systems Engineering, Monash University, Melbourne, VIC 3800, Australia

Redouté, Jean-Michel ; Université de Liège - ULiège > Dép. d'électric., électron. et informat. (Inst.Montefiore) > Systèmes microélectroniques intégrés

Language :

English

Title :

An Integrated LVDS Transmitter-Receiver System with Increased Self-Immunity to EMI in 0.18-μm CMOS

Publication date :

2016

Journal title :

IEEE Transactions on Electromagnetic Compatibility

ISSN :

0018-9375

eISSN :

1558-187X

Publisher :

Institute of Electrical and Electronics Engineers Inc.

Volume :

Issue :

Pages :

231-240

Peer reviewed :

Peer Reviewed verified by ORBi

Available on ORBi :

since 13 September 2018

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Bibliography

IEEE Standard for Low-Voltage Differential Signals (LVDS) for Scalable Coherent Interface (SCI), IEEE Standard 1596. 3, 1996.
J.-M. Redouté, and M. Steyaert, EMC of Analog Integrated Circuits. New York, NY, USA: Springer-Verlag, 2010.
S. Ben Dhia, M. Ramdani, and E. Sicard, Electromagnetic Compatibility of Integrated Circuits. New York, NY, USA: Springer-Verlag, 2006.
J. Byun and H. Y. Lee, "Analysis and improvement of electromagnetic susceptibility on high speed LVDS I/O system, " in Proc. IEEE Asia-Pac. Microw. Conf., Yokohama, Japan, Dec. 2010, pp. 175-178.
K. Radkovsk, M. Kaska, Z. Motycka, and P. Fiala, "Design of LVDS bus with high EMC compliance, " presented at the 17th Int. Radioelektronika Conf., Brno, Czech Republic, Apr. 2007.
H. Y. D. Yang, "Analysis of RF radiation interference on wireless communication systems, " IEEE Antennas Wireless Propag. Lett., vol. 2, no. 1, pp. 126-129, 2003.
G. Matig-A, M. R. Yuce, and J.-M. Redouté, "An integrated LVDS transmitter in 0. 18 um CMOS technology with high immunity to EMI, " IEEE Trans. Electromagn. Compat., vol. 57, no. 1, pp. 128-134, Feb. 2015.
Integrated Circuits-Measurement of Electromagnetic Immunity-Part 4: Direct Power Injection Method, IEC62132-4, ed. 1, 2010.
Integrated Circuits-Measurement of Electromagnetic Immunity-Part 2: Measurement of Radiated Immunity-TEM Cell and Wideband TEM Cell Method, IEC62132-2, ed. 1, 2010.
G. Matig-a and H. Y. Huang, "Preemphasis and equalization based LVDS transmitter and receiver, " Springer J. Analog Integr. Circuits Signal Process., vol. 75, no. 1, pp. 109-123, Apr. 2013.
A. Boni, A. Pierazzi, and D. Vecchi, "LVDS I/O interface for Gb/s-perpin operation in 0. 35-?m CMOS, " IEEE J. Solid-State Circuits, vol. 36, no. 4, pp. 706-711, Apr. 2001.
A. Tajalli and Y. Leblebici, "A slew controlled LVDS output driver cricuit in 0. 18 ?m CMOS technology, " IEEE J. Solid-State Circuits, vol. 44, no. 2, pp. 538-548, Feb. 2009.
B. Razavi, Design of Analog CMOS Integrated Circuits. New York, NY, USA: McGraw-Hill, 2001.
W. Redman-White, "A high bandwidth constant gm and slew-rate rail-torail CMOS input circuit and its application to analog cells for low voltage VLSI systems, " IEEE J. Solid-State Circuits, vol. 32, no. 5, pp. 701-712, May 1997.
P. Allen and D. Holberg, CMOS Analog Circuit Design. Oxford, U. K. : Oxford Univ. Press, 2002.
Integrated Circuits-Measurement of Electromagnetic Immunity 150 kHz to 1 GHz-Part 4: Direct RF Power Injection Method, IEC62132-4, ed. 1, 2006.
A. Alaeldine, R. Perdriau, M. Ramdani, J. L. Levant, and M. Drissi, "A direct power injection model for immunity prediction in integrated circuits, " IEEE Trans. Electromagn. Compat., vol. 50, no. 1, pp. 52-62, Feb. 2008.
F. Fiori and F. Musolino, "Investigation on the effectiveness of the IC susceptibility TEM cell method, " IEEE Trans. Electromagn. Compat., vol. 46, no. 1, pp. 110-115, Feb. 2004.
T. Mandic, R. Gillon, B. Nauwelaers, and A. Baric, "Characterizing the TEM cell electric and magnetic field coupling to PCB transmission lines, " IEEE Trans. Electromagn. Compat., vol. 54, no. 5, pp. 976-985, Oct. 2012.