[en] This paper presents a novel CMOS Miller operational amplifier (OpAmp) that has high immunity to electromagnetic interference (EMI). The proposed CMOS Miller OpAmp uses the replica concept with the source-buffered technique in order to achieve high EMI immunity across a wide range of frequencies (10 MHz to 1 GHz). The proposed amplifier is designed using the first-order quadratic mathematical model. The modeling includes the body effect and channel length modulation. The circuit has been fabricated using 0.18 µm mixed-mode CMOS technology. Measurement results illustrate how the proposed Miller OpAmp reduces susceptibility to EMI even in the presence of high-amplitude interferences that are as high as 1 Vpp. Experimental results show that the maximum EMI-induced output offset voltage for the proposed Miller OpAmp is less than 10 mV over a wide range of frequencies (10 MHz to 1 GHz) when a 900 mVpp EMI signal is injected into the noninverting input. In contrast, the classic Miller OpAmp generates a maximum output offset voltage of 215 mV at 1 GHz under the same operating conditions. The measured results of the EMI-induced input offset corroborates the circuit simulations.
Disciplines :
Electrical & electronics engineering
Author, co-author :
Boyapati, S.; IITB-Monash Research Academy, IIT Bombay, Mumbai, 400076, India
Redouté, Jean-Michel ; Université de Liège - ULiège > Dép. d'électric., électron. et informat. (Inst.Montefiore) > Systèmes microélectroniques intégrés
Shojaei Baghini, M.; Department of Electrical and Computer Systems Engineering, Monash University, Clayton, VIC, Australia, Department of Electrical Engineering, IIT Bombay, Mumbai, India
Language :
English
Title :
Design of A Novel Highly EMI-Immune CMOS Miller OpAmp Considering Channel Length Modulation
Publication date :
2017
Journal title :
IEEE Transactions on Circuits and Systems I: Regular Papers
ISSN :
1549-8328
eISSN :
1558-0806
Publisher :
Institute of Electrical and Electronics Engineers Inc.
J.-M. Redouté and M. Steyaert, EMC of Analog Integrated Circuits. New York, NY, USA: Springer, 2010.
A. Richelli, L. Colalongo, Z. M. Kovaca-Vanja, "Increasing the immunity to electromagnetic interferences of CMOS OpAmps, " IEEE Trans. Rel., vol. 52, no. 3, pp. 349-353, Sep. 2003.
F. Fiori, "Operational amplifier input stage robust to EMI, " Electron. Lett., vol. 37, no. 15, pp. 930-931, Jul. 2001.
M. T. Abuelma'atti, "Analysis of the effect of radio frequency interference on the DC performance of CMOS operational amplifiers, " Analog Integr. Circuits Signal Process., vol. 45, no. 2, pp. 123-130, 2005.
F. Fiori, "A new nonlinear model of EMI-induced distortion phenomena in feedback CMOS operational amplifiers, " IEEE Trans. Electromagn. Compat., vol. 44, no. 4, pp. 495-502, Nov. 2002.
J.-M. Redouté and M. Steyaert, "EMI resisting CMOS differential pair structure, " Electron. Lett., vol. 42, no. 21, pp. 1217-1218, Oct. 2006.
J.-M. Redouté and M. Steyaert, "A CMOS source-buffered differential input stage with high EMI supression, " in Proc. Eur. Solid-State Circuits Conf., Edinburgh, U.K., 2008, pp. 318-321.
C. Walravens, S. van Winckel, J.-M. Redouté, M. Steyaert, "Efficient reduction of electromagnetic interference effects in operational amplifiers, " Electron. Lett., vol. 43, no. 2, pp. 84-85, Jan. 2007.
A. Richelli, "CMOS OpAmp resisting to large electromagnetic interferences, " IEEE Trans. Electromagn. Compat., vol. 52, no. 4, pp. 1062-1065, Nov. 2010.
B. Subrahmanyam, D. Das, M. S. Baghini, J.-M. Redouté, "A balanced CMOS OpAmp with high EMI immunity, " in Proc. EMC Eur., Gothenburg, Sweden, Sep. 2014, pp. 703-708.
A. Richelli and J.-M. Redouté, "Increasing the EMI immunity of CMOS operational amplifiers using an on-chip common-mode cancellation circuit, " in Proc. IEEE EMC Eur. Conf., Gotheborg, Sweden, Sep. 2014, pp. 698-702.
M. Grassi, J.-M. Redouté, A. Richelli, "Increasing EMI immunity of CMOS operational amplifiers using an integrated on-chip commonmode cancellation circuit, " in Proc. IEEE EMC Eur. Conf., Dresden, Germany, Aug. 2015, pp. 34-39.
S. Boyapati, J.-M. Redouté, M. S. Baghini, "Modeling and design of EMI-immune OpAmps in 0.18-m CMOS technology, " IEEE Trans. Electromagn. Compat., vol. 58, no. 5, pp. 1609-1616, Jun. 2016.
W. Sansen, "Distortion in elementary transistor circuits, " IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 46, no. 3, pp. 315-325, Mar. 1999.
P. Wambacq and W. Sansen, Distortion Analysis of Analog Integrated Circuits. Norwell, MA, USA: Kluwer, 1998.
F. Fiori, "Design of an operational amplifier input stage immune to EMI, " IEEE Trans. Electromagn. Compat., vol. 49, no. 4, pp. 834-839, Nov. 2007.
J. Yu, A. Amer, E. Sanchez-Sinencio, "Electromagnetic interference resisting operational amplifier, " IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 61, no. 7, pp. 1917-1927, Jul. 2014.
L. H. Ge, H. X. Bai, S. G. Xie, D. L. Su, "Bulk-driven CMOS amplifier with high EMI immunity, " IEEE Trans. Electromagn. Compat., vol. 57, no. 6, pp. 1425-1434, Dec. 2015.
B. Razavi, Design of Analog CMOS Integrated Circuits. New York, NY, USA: McGraw-Hill, 2001.
Y. Cheng, "BSIM3v3 manual, " Univ. California, Berkeley, CA, USA, Tech. Rep. 1996.
[Online]. Available: Http://www.mosis.com
J.-M. Redouté and M. Steyaert, "EMI resistant CMOS differential input stages, " IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 57, no. 2, pp. 323-331, Feb. 2010.
A. Richelli, G. A. Matig-a, J.-M. Redouté, "Design of a folded cascode opamp with increased immunity to conducted electromagnetic interference in 0.18 m CMOS, " Microelectron. Rel., vol. 55, no. 3, pp. 654-661, 2015.
C. Widemann, S. Stegemann, W. John, W. Mathis, "Analytic investigations on the susceptibility of nonlinear analog circuits to substrate noise, " Adv. Radio Sci., vol. 11, pp. 171-175, Jul. 2013.
