Throughput rate optimization in the automated assembly of printed circuit boards

The electronics industry relies heavily on numerically controlled machines for the placement of electronic components on the surface of printed circuit boards (PCB). This paper proposes a heuristic hierarchical approach to the problem of optimizing the throughput rate of a line of several such machines, devoted to the assembly of a single type of PCB. A number of well-known NP-hard problems emerge, for which mathematical models and heuristic solution methods are developed. The approach is tested on a real-life problem, for which it is shown to perform well.